1. Field of the Invention
The present invention relates to a solid-state imaging apparatus including analog-to-digital converters (AD converters) and an imaging system using the solid-state imaging apparatus.
2. Description of the Related Art
In recent years, there is proposed a configuration for providing an AD converter for each of columns and performing high-speed readout in a MOS type solid-state imaging apparatus.
FIG. 12 is a diagram illustrating the circuit configuration of a MOS type solid-state imaging apparatus 10 disclosed in Japanese Patent Application Laid-Open No. 2008-103992. Japanese Patent Application Laid-Open No. 2008-103992 discloses a solid-state imaging apparatus including AD converters 16 and 17 for each of columns of pixels 30 in order to realize an increase in speed. The solid-state imaging apparatus disclosed in Japanese Patent Application Laid-Open No. 2008-103992 includes plural data buses 19 and 20 that transmit AD-converted digital signals for the pixels independently from each other and reads out the digital signals from the plural data buses 19 and 20 in parallel.
Japanese Patent Application Laid-Open No. 2008-103992 also discloses a technique for dividing the pixels into two sections, a left section 11 and a right section 12, by a dividing line parallel to the columns and simultaneously reading out signals.
However, in the configuration disclosed in Japanese Patent Application Laid-Open No. 2008-103992, there is a significant problem in that, in the system for dividing the pixels into the left and right sections in the column direction of the pixels, signals cannot be read out in order in which the pixels are arrayed.
Usually, in an imaging apparatus, pixels in which photoelectric conversion elements are shielded from light called OB (optical black) pixels are arranged in respective rows and outputs of the CB pixels are used for correction and the like in a direction parallel to the rows. However, when the pixels are divided into the left and right sections, for example, if the OB pixels are arranged only on the left side of a pixel region, outputs of the OB pixels cannot be read out from an output terminal on the right side. Therefore, it is difficult to correct the outputs read out from the output terminal on the right side using the OB pixels.
Therefore, there is a demand for a technique for dividing a data bus for outputting digital signals into two or more sections and outputting outputs in order in which the pixels are arrayed.